Fabricating various metal-oxide-semiconductor (MOS) and bipolar devices, which employ high-quality epitaxial structures or polysilicon contacts to doped single-crystal silicon regions, requires effective preprocess cleaning of a the semiconductor surface to remove thin native oxide layers and other contaminants (such as residual metallic and organic impurities). Moreover, cleaning of a silicon surface prior to MOS gate dielectric formation is an important requirement for improved MOS yield and reliability.
In particular, undesirable native oxide layers, 5-30 .ANG. thick, are grown on the semiconductor wafer surface as a result of various wet chemical treatments (such as nitric acid or NH.sub.4 OH:H.sub.2 O.sub.2 :H.sub.2 O or sulfuric acid cleaning) and other fabrication procedures, or even exposure to ambient air during wafer storage and transport between process steps. The thickness of these native oxide layers depends upon the source; for example, oxides resulting from ambient exposure are usually less than about 12 .ANG., chemically grown oxides resulting from exposure to ammonium hydroxide-hydrogen peroxide are usually less than about 17 .ANG., and oxides resulting from hot nitric acid are usually less than about 30 .ANG. in thickness.
A conventional procedure for removing surface contaminants and native oxides prior to epitaxial silicon growth processes and some gate dielectric formation processes involves an ex-situ aqueous cleaning (such as the so-called RCA cleaning followed by a final HF dip), followed by an in-situ high-temperature (around 1000.degree. C. to 1200.degree. C.) H.sub.2 bake. The wet clean step is expected to remove most of the native oxide and other trace contaminants, while the high-temperature H.sub.2 prebake removes the residual native oxide layer left on the semiconductor surface due to ambient exposure during wafer transport to the fabrication equipment. In some applications, the in-situ prebake process may employ an H.sub.2 +HCl process ambient. However, an H.sub.2 +HCl prebake is not suitable for low temperature native oxide removal applications due to its requirement for relatively high (.gtorsim.900.degree. C.) prebake temperatures. High in-situ surface cleaning temperatures are undesirable since they can result in significant dopant redistribution in the semiconductor substrate.
The conventional native-oxide removal processes have a number of disadvantages and limitations. The wet cleaning processes requires careful control which impacts process reproducibility and large amounts of chemicals are consumed by the aqueous cleaning process. Moreover, these cleaning chemicals must be disposed of in accordance with increasingly stringent environmental regulations. Wet surface cleaning processes do not address the problem of native oxide growth due to ambient exposure during wafer transport to the fabrication equipment. A hydrogen prebake process requires relatively high substrate temperatures which cause undesirable structural modifications in semiconductor devices.
Another disadvantage that is becoming increasingly significant is ex-situ wet cleaning steps cannot be easily cluster integrated with the subsequent gas-phase processing reactors (such as the reactor for a gate oxidation or an epitaxial growth process). This limitation of ex-situ cleaning processes can result in fabrication yield reduction due to repeated exposure of wafers to ambient air and insufficient device manufacturing automation.
Moreover, ex-situ cleaning processes do not take advantage of the capabilities of single-wafer integrated in-situ multiprocessing reactors. In-situ multiprocessing allows integration of several reactive processing steps in one wafer processing chamber for controlled formations of a desired device microstructure without removing the wafer or exposing the wafer to the ambient between various fabrications steps. The multiprocessing methodology offers enhanced equipment utilization, improved process reproducibility and yield, and reduced chip manufacturing cycle time and cost.
The conventional multiprocessing methodology employed for an epitaxial multilayer structure involves cycling process parameters--substrate temperature, chamber pressure, and process gas flow rates--off and on in transitioning between adjacent fabrication process steps (such as depositions of silicon, silicon-germanium alloys, dielectrics, and polysilicon). For instance, for a rapid thermal chemical-vapor deposition (RTCVD) reactor, during the transition after the end of a process step, the heating lamp is turned off, and usually, gas flows are shut off and the process chamber is pumped down. When process gas flows have been stopped and the chamber pumped down, the transition period is completed by turning on the process gases for the subsequent process step and stabilizing chamber pressure and process environments. Once the chamber environments are stabilized the heating lamp is turned on to achieve the desired wafer temperature in order to drive the subsequent fabrication process step.
This process methodology has a number of potential problems. Thermal cycling from process temperatures to a lamp-off condition may result in thermally induced stresses that can damage the wafer and reduce device fabrication yield. Maintaining the wafer at room temperature during transitions increases the adsorption of residual vacuum impurities (O.sub.2, H.sub.2 O and hydrocarbons). This contaminant adsorption problem is particularly magnified if process gases are shut down and the chamber is pumped down to near vacuum. Vacuum cycling (pumping and venting) is also a significant source of particulate contamination in the process chamber and on the wafer surface.
Taking full advantage of the in-situ multiprocessing methodology capabilities requires development of appropriate dry in-situ cleaning processes that can eliminate the need for wet cleaning processes. In addition, multiprocessing methodologies are optimized if the adverse effects of process parameter cycling are minimized.
Thus, an alternative to the conventional ex-situ wet clean/in-situ H.sub.2 bake processes used for such applications as gate dielectric growth and epitaxial growth would be advantageous for both multiwafer (batch) and single-wafer semiconductor fabrication reactors. A number of dry oxide removal procedures have been proposed as an alternative to ex-situ wet cleaning; however, all have certain limitations or disadvantages.
One alternative native oxide removal procedure is based on heating the semiconductor silicon wafer in an ultra-high vacuum (UHV) process chamber with a vacuum base pressure of 1.times.10.sup.-8 Torr or lower at substrate temperatures in the range of 800.degree. C. to 1000.degree. C. The temperature for this procedure can be lowered by chemical enhancement to around 625.degree.-700.degree. C. through predeposition of a sub-monolayer of germanium on the surface prior to UHV heating. Germanium atoms on the silicon surface can break the silicon-oxygen bonds in native oxide layers, thereby producing new chemical by-products that sublimate at temperatures as low as 625.degree. C. In absence of germanium, the native oxide layers are stable in UHV heating environments well in excess of 750.degree. C. Even at the lower temperature this procedure requires expensive UHV equipment technology and is only useful for thin native oxide layers of about 10 .ANG. (compared to typical native oxide thicknesses of up to 30 .ANG. or more).
A second alternative process uses low-energy Ar plasma sputtering at temperatures on the order of 850.degree. C., although process temperatures can be lowered to around 700.degree.-800.degree. C. by using an Ar/H.sub.2 plasma. This procedure requires plasma sputter etch equipment and causes residual sputtering-induced damage to the semiconductor surface, resulting in defects in the subsequently grown materials layers.
A third alternative process uses a remote H.sub.2 plasma at relatively low substrate temperatures of around 400.degree. C. or less. This process operates at temperatures low enough to avoid any significant dopant redistribution, but is only useful for thin native oxide layers of less than about 10 .ANG.. Moreover, exposure of a semiconductor surface to hydrogen plasma may cause surface damage and roughness problems.
A fourth alternative dry oxide removal process has been proposed that does not necessarily involve complete pre-process removal of the native oxide, but rather its partial removal and suppression of its undesirable effects by deposition of a buffer layer prior to the epitaxial growth process. In connection with plasma-enhanced epitaxial growth of GeSi alloy films at a substrate temperature of 750.degree. C., it has been observed that the addition of a small amount of Ge to Si (and growing a GeSi buffer layer) improves the crystallinity of the grown epitaxial silicon layers. Based on this observation, the crystalline quality of epitaxial Si layers grown on a GeSi buffer layer containing a few atomic percent Ge has been investigated using a plasma deposition process in which GeH.sub.4 is added to the SiH.sub.4 process ambient during the initial stage of epitaxial Si growth in order to make a buffer GeSi layer of about 1000 .ANG. containing 0.6-5 atomic percent Ge. The use of this GeSi buffer layer by addition of a small amount of GeH.sub.4 to SiH.sub.4 during the initial stage of the process results in good-quality Si epitaxy. This effect has been attributed to the possible removal of the native oxide layer by the reaction of germanium with SiO.sub.2 to form volatile GeO.sub. 2 and GeO species. This method depends on the growth of a buffer layer containing Ge prior to the epitaxial Si growth in a plasma CVD reactor and is not suitable for most semiconductor device processes.
A fifth alternative process uses an electron cyclotron resonance (ECR) plasma of low ion energy (50-300 eV) H.sub.2 or H.sub.2 +SiH.sub.4. This process accomplishes native oxide removal at relatively low temperatures of about 650.degree. C., mostly by ion activated chemical reduction reactions with little sputtering action, but requires a dedicated ECR plasma processing reactor. Oxide removal is possibly via formation of SiO and SiH volatile species. The in-situ ECR-H.sub.2 plasma cleaning and native oxide removal at temperatures as low as 200.degree. C. have been achieved.
A sixth alternative native oxide removal process is not completely dry, but rather, uses a mixture of HF gas and water vapor. While not aqueous, the HF+H.sub.2 O (vapor) process is highly corrosive, and requires a dedicated process chamber with special reactor wall passivation layers. The HF-vapor etch processes can remove relatively thick layers of oxide; however, it has been shown that they can result in formation of surface residues and particulates, thus, requiring a post-etch wafer rinse step.
A seventh alternative native oxide removal technique is based on the use of fluorine-containing species in the process environment. Various non-plasma and plasma processes based on CF.sub.4, NF.sub.3, ClF.sub.3 and GeF.sub.4 have been proposed for silicon surface cleaning and native oxide removal. These processes can remove native oxide layers via plasma and/or thermal activation under the chemical action of the fluorine species. However, these processes generally offer poor etch selectivities with respect to Si such that the native oxide removal process may also remove a significant amount of Si in the exposed regions of the wafer. The fluorine-based chemistries may also result in undesirable Si-F surface bonds causing defective epitaxial layers. The fluorine-containing species may also attack the reactor walls and cause particle contamination problems.